The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2024

Filed:

Nov. 05, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Fulvio Rori, Boise, ID (US);

Chiara Cerafogli, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 11/56 (2006.01); G11C 16/04 (2006.01); G11C 16/16 (2006.01); G11C 16/32 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3472 (2013.01); G11C 16/0483 (2013.01); G11C 16/16 (2013.01); G11C 16/32 (2013.01); G11C 16/3445 (2013.01); G11C 11/56 (2013.01);
Abstract

An example method includes, performing a first erase verify on a first set of memory cells of a portion of an array of memory cells, performing a second erase verify on a second set of memory cells of the portion of the array, applying a first erase voltage pulse concurrently to each memory cell in the portion of the array if the first set fails the first erase verify and if the second set fails the second erase verify, and applying a second erase voltage pulse concurrently to each memory cell in the portion of the array if the first set passes the first erase verify and if the second set fails the second erase verify. The second erase voltage pulse is different than the first erase voltage pulse.


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