The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2024

Filed:

Dec. 29, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Amit Bleiweiss, Yad Binyamin, IL;

Abhishek Venkatesh, Hillsboro, OR (US);

Gokce Keskin, Mountain View, CA (US);

John Gierach, Portland, OR (US);

Oguz Elibol, Sunnyvale, CA (US);

Tomer Bar-On, Petah Tikva, IL;

Huma Abidi, Santa Clara, CA (US);

Devan Burke, Portland, OR (US);

Jaikrishnan Menon, Portland, OR (US);

Eriko Nurvitadhi, Hillsboro, OR (US);

Pruthvi Gowda Thorehosur Appajigowda, San Jose, CA (US);

Travis T. Schluessler, Berthoud, CO (US);

Dhawal Srivastava, Phoenix, AZ (US);

Nishant Patel, Santa Clara, CA (US);

Anil Thomas, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06N 3/063 (2023.01); G06F 9/38 (2018.01); G06N 3/04 (2023.01); G06N 3/08 (2023.01); G06N 5/046 (2023.01); G06N 20/00 (2019.01); G06T 1/20 (2006.01);
U.S. Cl.
CPC ...
G06N 3/063 (2013.01); G06F 9/3887 (2013.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01); G06N 5/046 (2013.01); G06N 20/00 (2019.01); G06T 1/20 (2013.01);
Abstract

An apparatus to facilitate compute optimization is disclosed. The apparatus includes a at least one processor to perform operations to implement a neural network and compute logic to accelerate neural network computations.


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