The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2024
Filed:
Jul. 31, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Shih-Wei Peng, Hsinchu, TW;
Guo-Huei Wu, Hsinchu, TW;
Wei-Cheng Lin, Hsinchu, TW;
Hui-Zhong Zhuang, Hsinchu, TW;
Jiann-Tyng Tzeng, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method of generating an IC layout diagram includes overlapping a channel region of an upper transistor of a complementary field-effect transistor (CFET) in an IC layout with a gate region of the CFET, thereby defining a channel overlap region, positioning an isolation region in the IC layout, the isolation region including an entirety of the channel overlap region, intersecting the isolation region with a conductive region, and generating an IC layout diagram based on the IC layout.