The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2024

Filed:

Feb. 03, 2022
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Yoshinobu Asami, Kanagawa, JP;

Yutaka Okazaki, Kanagawa, JP;

Satoru Okamoto, Kanagawa, JP;

Shinya Sasagawa, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); C23C 16/40 (2006.01); C23C 16/455 (2006.01); H01L 21/475 (2006.01); H01L 21/4757 (2006.01); H01L 21/67 (2006.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7869 (2013.01); C23C 16/40 (2013.01); C23C 16/45531 (2013.01); H01L 21/475 (2013.01); H01L 21/47573 (2013.01); H01L 21/67207 (2013.01); H01L 27/1207 (2013.01); H01L 27/1225 (2013.01); H01L 29/0649 (2013.01); H01L 29/41733 (2013.01); H01L 29/42356 (2013.01); H01L 29/42376 (2013.01); H01L 29/42384 (2013.01); H01L 29/66969 (2013.01); H01L 29/78603 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01); H01L 21/02554 (2013.01); H01L 21/02565 (2013.01); H01L 21/0262 (2013.01);
Abstract

A semiconductor device includes a first oxide insulating layer over a first insulating layer, an oxide semiconductor layer over the first oxide insulating layer, a source electrode layer and a drain electrode layer over the oxide semiconductor layer, a second insulating layer over the source electrode layer and the drain electrode layer, a second oxide insulating layer over the oxide semiconductor layer, a gate insulating layer over the second oxide insulating layer, a gate electrode layer over the gate insulating layer, and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer. A side surface portion of the second insulating layer is in contact with the second oxide insulating layer. The gate electrode layer includes a first region and a second region. The first region has a width larger than that of the second region.


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