The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2024

Filed:

May. 30, 2023
Applicant:

Transphorm Technology, Inc., Goleta, CA (US);

Inventors:

David Michael Rhodes, Santa Barbara, CA (US);

Yifeng Wu, Goleta, CA (US);

Sung Hae Yea, La Canada, CA (US);

Primit Parikh, Goleta, CA (US);

Assignee:

Transphorm Technology, Inc., Goleta, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 23/14 (2006.01); H01L 23/31 (2006.01); H01L 23/373 (2006.01); H01L 25/16 (2023.01); H01L 27/088 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 23/142 (2013.01); H01L 23/3107 (2013.01); H01L 23/3735 (2013.01); H01L 27/0883 (2013.01); H03K 17/6871 (2013.01); H03K 2217/0063 (2013.01); H03K 2217/0072 (2013.01);
Abstract

An electronic module for a half-bridge circuit includes a base substrate with an insulating layer between a first metal layer and a second metal layer. A trench formed through the first metal layer electrically isolates first, second, and third portions of the first metal layer from one another. A high-side switch includes an enhancement-mode transistor and a depletion-mode transistor. The depletion-mode transistor includes a III-N material structure on an electrically conductive substrate. A drain electrode of the depletion-mode transistor is connected to the first portion, a source electrode of the enhancement-mode transistor is connected to the second portion, a drain electrode of the enhancement-mode transistor is connected to a source electrode of the depletion-mode transistor, a gate electrode of the depletion-mode transistor is connected to the electrically conductive substrate, and the electrically conductive substrate is connected to the second portion.


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