The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2024

Filed:

Nov. 07, 2023
Applicant:

Iqm Finland Oy, Espoo, FI;

Inventors:

Máté Jenei, Espoo, FI;

Kok Wai Chan, Espoo, FI;

Kuan Yen Tan, Espoo, FI;

Assignee:

IQM Finland OY, Espoo, FI;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 2223/54426 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/8113 (2013.01);
Abstract

The invention relates to the field of chip fabrication, in particular to the fabrication of superconducting integrated circuits for use in quantum computers. Raised and recessed alignment structures are provided on the surfaces of two substrate such that the raised and recessed alignment structure extends within the recessed alignment structure to a maximum depth determined by the geometry of the alignment structures. The alignment structures act as a hard stop for positioning and aligning the substrates for flip chip bonding.


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