The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2024
Filed:
Feb. 24, 2020
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Ping Wu, Shanghai, CN;
Yingwen Chen, Shanghai, CN;
Lei Zhu, Shanghai, CN;
Zhenglong Wu, Shanghai, CN;
Tao Xu, Shanghai, CN;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/00 (2018.01); G06F 9/4401 (2018.01); G06F 9/50 (2006.01); G06F 1/24 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4403 (2013.01); G06F 9/4411 (2013.01); G06F 9/5016 (2013.01); G06F 1/24 (2013.01); G06F 9/4401 (2013.01);
Abstract
Systems, apparatuses and methods may provide for technology that initializes an integrated memory of a processor during a boot sequence and conducts a runtime initialization of an external system memory associated with the processor. The technology may also bypass the runtime initialization of the external system memory during the boot sequence.
Wu, Ping. (2024). Implementing external memory training at runtime (U.S. Patent No. 12073226). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12073226
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile