The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2024

Filed:

Dec. 18, 2019
Applicant:

Vayo (Shanghai) Technology Co., Ltd., Shanghai, CN;

Inventors:

Jishuo Liu, Shanghai, CN;

Jiuxuan Liu, Shanghai, CN;

Yongqiang Song, Shanghai, CN;

Yongjian Qu, Shanghai, CN;

Shengjie Qian, Shanghai, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/39 (2020.01); G06F 30/392 (2020.01); G06F 30/398 (2020.01); H05K 3/00 (2006.01); H05K 3/12 (2006.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/398 (2020.01); H05K 3/0005 (2013.01); H05K 3/1225 (2013.01);
Abstract

A stencil step design method and system, a computer readable storage medium and a device. The method comprises: acquiring data of stencil apertures for electronic components in a circuit board, and identifying the stencil apertures for electronic components one by one to determine whether the stencil apertures need to be stepped; and if yes, performing step design for the stencil apertures that need to be stepped according to preset step rules corresponding to the stencil apertures for electronic components one by one so as to generate a stencil step design file with the step design, and outputting the stencil step design file. According to the present disclosure, 90% or more steps can be automatically designed and the stencil step design is in conformity with processing requirements. A manual intervention process is omitted, and the design can be accomplished by several simple steps.


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