The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2024

Filed:

Oct. 21, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Byunghoon Lee, Suwon-si, KR;

Changyoung Jeong, Suwon-si, KR;

Byunggook Kim, Suwon-si, KR;

Maenghyo Cho, Seoul, KR;

Muyoung Kim, Seoul, KR;

Junghwan Moon, Seoul, KR;

Sungwoo Park, Seoul, KR;

Hyungwoo Lee, Seoul, KR;

Joonmyung Choi, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/00 (2006.01); G05B 19/4097 (2006.01); H01L 21/027 (2006.01);
U.S. Cl.
CPC ...
G03F 7/705 (2013.01); G05B 19/4097 (2013.01); H01L 21/0273 (2013.01); G05B 2219/45028 (2013.01);
Abstract

There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.


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