The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2024

Filed:

Nov. 18, 2019
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Shuhei Nagatsuka, Atsugi, JP;

Tatsuya Onuki, Atsugi, JP;

Kiyoshi Kato, Atsugi, JP;

Shunpei Yamazaki, Setagaya, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 27/12 (2006.01); H01L 29/24 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H10B 12/00 (2023.02); H01L 27/1225 (2013.01); H01L 27/124 (2013.01); H01L 27/1255 (2013.01); H01L 29/24 (2013.01); H01L 29/78648 (2013.01); H01L 29/78651 (2013.01); H01L 29/7869 (2013.01);
Abstract

A novel memory device is provided. Over a driver circuit layer, N memory layers (N is a natural number greater than or equal to 2) including a plurality of memory cells provided in a matrix are stacked. The memory cell includes two transistors and one capacitor. An oxide semiconductor is used as a semiconductor included in the transistor. The memory cell is electrically connected to a write word line, a selection line, a capacitor line, a write bit line, and a read bit line. The write bit line and the read bit line extend in the stacking direction, whereby the signal propagation distance from the memory cell to the driver circuit layer is shortened.


Find Patent Forward Citations

Loading…