The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2024

Filed:

Oct. 29, 2021
Applicant:

Avago Technologies International Sales Pte. Limited, Singapore, SG;

Inventors:

Michael Wang, Irvine, CA (US);

Cheng Lee, Irvine, CA (US);

Joon Yeob Lee, Irvine, CA (US);

Reza Sharifi, Irvine, CA (US);

Liming Tsau, Irvine, CA (US);

Junfei Zhu, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 23/4985 (2013.01); H01L 23/49866 (2013.01); H01L 23/5386 (2013.01); H01L 23/5387 (2013.01); H01L 25/50 (2013.01);
Abstract

An integrated circuit (IC) package includes a one or more die and an interposer. The interposer is coupled to the die and includes circuit traces. The circuit traces are provided in a serpentine configuration. A method can be used to fabricate an integrated circuit package. The method can use an interposer circuit traces having a configuration that allows the circuit traces to deform under stress, and return to an original state undamaged more readily than a straight conductive trace.


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