The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2024

Filed:

Apr. 11, 2022
Applicant:

Arteris, Inc., Campbell, CA (US);

Inventors:

Mokhtar Hirech, Sunnyvale, CA (US);

Benoit de Lescure, Campbell, CA (US);

Assignee:

ARTERIS, INC., Campbell, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/30 (2020.01); G06F 30/327 (2020.01); G06F 30/3312 (2020.01); G06F 30/337 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/327 (2020.01); G06F 30/3312 (2020.01); G06F 30/337 (2020.01); G06F 2119/12 (2020.01);
Abstract

Generation of a full register-transfer level (RTL) description of an electronics system includes generating an optimized pipeline configuration from inputs including a database of RTL elements, and a list of configurable pipeline components; and generating the full RTL description with the pipeline components configured according to the optimized pipeline configuration. Generating the configuration includes performing a search for a configuration that optimizes area and timing.


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