The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2024
Filed:
May. 26, 2023
Winbond Electronics Corp., Taichung, TW;
Yen-De Lee, Taichung, TW;
Ching-Yung Wang, Taichung, TW;
Chien-Hsiang Yu, Taichung, TW;
Hung-Sheng Chen, Taichung, TW;
WINBOND ELECTRONICS CORP., Taichung, TW;
Abstract
A method for manufacturing a resistive random access memory structure is provided. The method includes providing a substrate, and the substrate includes an array region and a peripheral region. The method includes forming a first low-k dielectric layer in the peripheral region, and the first low-k dielectric layer has a dielectric constant of less than 3. The method includes forming a plurality of memory cells on the substrate and in the array region. The method includes forming a dummy memory cell at a boundary between the array region and the peripheral region. The method includes forming a gap-filling dielectric layer on the substrate. The method includes forming a plurality of first conductive plugs in the gap-filling dielectric layer, and each of the plurality of first conductive plugs is in contact with one of the plurality of memory cells.