The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2024
Filed:
Oct. 30, 2020
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Li-Chao Yin, Hsinchu, TW;
Hung-Bin Lin, New Taipei, TW;
Hsin-Hsien Wu, Hsinchu, TW;
Chih-Ming Ke, Hsinchu, TW;
Chyi Shyuan Chern, Taipei, TW;
Ming-Hua Lo, Hsinchu, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); G03F 7/00 (2006.01); H01L 21/30 (2006.01); H01L 21/322 (2006.01);
U.S. Cl.
CPC ...
H01L 22/12 (2013.01); G03F 7/70033 (2013.01); G03F 7/70616 (2013.01); G03F 7/70783 (2013.01); H01L 21/30 (2013.01); H01L 21/3228 (2013.01); H01L 22/20 (2013.01);
Abstract
In a method, a structure including two or more materials having different coefficients of thermal expansion is prepared, and the structure is subjected to a cryogenic treatment. In one or more of the foregoing and following embodiments, the structure includes a semiconductor wafer and one or more layers are formed on the semiconductor wafer.