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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12062573 B1

PDFFull Text
Date of Patent:
Aug. 13, 2024

Filed:

Feb. 26, 2021

Method for forming barrier layer in semiconductor structure

Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Peng Zhou, Wuhan, CN;

Shuliang Lv, Wuhan, CN;

Ge Mao, Wuhan, CN;

Yuan Li, Wuhan, CN;

Rui Song, Wuhan, CN;

Assignee:

YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan, CN;

Attorney:

BAYES PLLC

Primary Examiner:

Bilkis Jahan

Assistant Examiner:

Victor V Barzykin

Int. Cl.
CPC ...
H01L 21/768 (2006.01); C23C 16/30 (2006.01); C23C 16/455 (2006.01); H01L 21/28 (2006.01); H01L 21/285 (2006.01); H01L 21/67 (2006.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01);
U.S. Cl.
CPC ...
H01L 21/76856 (2013.01); C23C 16/303 (2013.01); C23C 16/45527 (2013.01); C23C 16/45546 (2013.01); H01L 21/28562 (2013.01); H01L 21/28568 (2013.01); H01L 21/67011 (2013.01); H01L 21/76829 (2013.01); H01L 21/76843 (2013.01); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H01L 29/40117 (2019.08);
Abstract

A method for forming a barrier layer in a semiconductor structure is disclosed. A substrate having a dielectric layer is provided. The dielectric layer is exposed to a precursor having a first metal, and a first ammonia treatment is performed. A first purge operation is performed, a second ammonia treatment is performed after the first purge operation, and a second purge operation is performed after the second ammonia treatment to form the barrier layer on the dielectric layer.

Find Patent Forward Citations

Zhou, Peng. (2024). Method for forming barrier layer in semiconductor structure (U.S. Patent No. 12062573). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12062573

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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