The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2024

Filed:

Jul. 26, 2022
Applicants:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

National Chiao-tung University, Hsinchu, TW;

Inventors:

Hung-Wei Yu, Yilan County, TW;

Yi Chang, Hsinchu County, TW;

Tsun-Ming Wang, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/10 (2006.01); H01L 29/205 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0262 (2013.01); H01L 21/02381 (2013.01); H01L 21/02395 (2013.01); H01L 21/02463 (2013.01); H01L 21/02502 (2013.01); H01L 21/0251 (2013.01); H01L 21/02546 (2013.01); H01L 21/02549 (2013.01); H01L 29/1033 (2013.01); H01L 29/205 (2013.01); H01L 29/7781 (2013.01);
Abstract

Methods and structures includes providing a substrate, forming a prelayer over a substrate, forming a barrier layer over the prelayer, and forming a channel layer over the barrier layer. Forming the prelayer may include growing the prelayer at a graded temperature. Forming the barrier layer is such that the barrier layer may include GaAs or InGaAs. Forming the channel layer is such that the channel layer may include InAs or an Sb-based heterostructure. Thereby structures are formed.


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