The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2024

Filed:

Jan. 14, 2022
Applicant:

Ampere Computing Llc, Santa Clara, CA (US);

Inventors:

Kha Hong Nguyen, Santa Clara, CA (US);

Harb Ali Abdulhamid, Durham, NC (US);

Phil Mitchell, San Jose, CA (US);

Assignee:

Ampere Computing LLC, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/4401 (2018.01);
U.S. Cl.
CPC ...
G06F 9/4405 (2013.01);
Abstract

Multi-socket computing system employing a parallelized boot architecture with partially-concurrent processor boot-up operations. In a boot of the multi-socket computing system, a first, master CPU in a master CPU socket is configured to receive a master reset signal indicating a boot-up state. In response, the first, master CPU is configured to execute a first boot program code to perform a first CPU boot-up operation. To parallelize the boot operation of a second, slave CPU in a slave CPU socket, the execution of the first boot program code by the first, master CPU includes communicating a slave boot-up synchronization signal indicating the boot-up state to the second CPU to execute a second boot program code to perform a second CPU boot-up operation. The second CPU starts to perform its CPU boot-up operation partially concurrent with the performance of the CPU boot-up operation to reduce overall boot-up time.


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