The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2024
Filed:
Nov. 23, 2021
Applicant:
Tektronix, Inc., Beaverton, OR (US);
Inventors:
Daniel S. Froelich, Portland, OR (US);
Sam J. Strickling, Portland, OR (US);
Assignee:
TEKTRONIX, INC., Beaverton, OR (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3183 (2006.01); G01R 31/30 (2006.01); G01R 31/317 (2006.01); G01R 31/3181 (2006.01); G01R 31/3185 (2006.01); G06F 30/367 (2020.01); G06F 115/12 (2020.01); G06F 119/06 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G01R 31/31707 (2013.01); G01R 31/30 (2013.01); G01R 31/31813 (2013.01); G01R 31/318314 (2013.01); G01R 31/318385 (2013.01); G01R 31/318572 (2013.01); G06F 30/367 (2020.01); G06F 2115/12 (2020.01); G06F 2119/06 (2020.01); G06F 2119/12 (2020.01);
Abstract
A margin testing device includes at least one interface structured to connect to a device under test (DUT) one or more controllers structured to create a set of test signals based on a sequence of pseudo random data and one or more pre-defined parameters, and an output structured to send the set of test signals to the DUT. Methods and a system for testing a DUT with the disclosed margin tester and other testing device are also described.