The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2024

Filed:

Nov. 22, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Shuai Guo, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0337 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01);
Abstract

The embodiment of the application provides a method of manufacturing a semiconductor structure, which comprises the following steps: forming a target layer, a first mask layer, an isolation layer and an intermediate layer sequentially on a substrate, wherein first trench is disposed in the intermediate layer in the first region and second trench is disposed in the intermediate layer in the second region; forming a fill layer, and the difference in the height between the top surface of the fill layer in the first region and in the second region is less than or equal to a first preset value; removing a portion of the fill layer in the first region until the top surface of the sacrificial layer is exposed; removing the sacrificial layer; and etching a portion of the target layer through the first opening, wherein the remaining target layer forms a target pattern.


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