The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2024

Filed:

Dec. 06, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Fan Xu, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/36 (2020.01); G06F 30/394 (2020.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/36 (2020.01); G06F 30/394 (2020.01);
Abstract

Embodiments of the present application provide a circuit simulation method and a device. The method includes: determining a top-layer structure and a minimum circuit cell layer of a circuit schematics; determining, in a circuit layout, an area and a relative distribution location of each target circuit cell in the minimum circuit cell layer; generating a first circuit structure based on the top-layer structure, each target circuit cell, and the area and the relative distribution location of each target circuit cell in the circuit layout; and adding a parasitic effect circuit to the first circuit structure, generating a target circuit structure corresponding to the circuit schematics, and performing simulation based on the target circuit structure.


Find Patent Forward Citations

Xu, Fan. (2024). Circuit simulation method and device (U.S. Patent No. 12045554). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12045554

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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