The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2024

Filed:

Dec. 21, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Xiang Li, Portland, OR (US);

Konika Ganguly, Portland, OR (US);

George Vergis, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 13/6461 (2011.01); H01R 12/70 (2011.01); H01R 12/71 (2011.01); H01R 13/24 (2006.01);
U.S. Cl.
CPC ...
H01R 12/7076 (2013.01); H01R 12/7082 (2013.01); H01R 12/714 (2013.01); H01R 13/2435 (2013.01);
Abstract

Connectors with a staggered pin orientation can reduce crosstalk amongst signal pins. In one example, a connector to couple a card or module to a motherboard includes connector housing and a plurality of pins. Each of the plurality of pins includes two ends including a card or module-facing end to couple with the card or module and a motherboard-facing end to couple with the motherboard. Each of the plurality of pins includes a middle section in the connector housing. One or both of the ends include one or more bends relative to the middle section. The plurality of pins includes alternating signal pins and ground pins, wherein the signal pins having an opposite orientation relative to the ground pins.


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