The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2024

Filed:

Aug. 30, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

I-Pin Chin, Hsinchu, TW;

Yu-Jen Chien, Hsinchu, TW;

Chin-Szu Lee, Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 61/00 (2023.01); C23C 16/455 (2006.01); G11C 11/16 (2006.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
H10B 61/00 (2023.02); C23C 16/45536 (2013.01); G11C 11/161 (2013.01); H01L 21/67017 (2013.01);
Abstract

A method of forming a memory device includes forming a dielectric structure over a wafer. A bottom electrode via is formed in the dielectric structure. A plasma deposition process is performed to deposit a bottom electrode layer over the bottom electrode via and performing the plasma deposition process includes off-axis rotating a magnet over the wafer to control plasma of the plasma deposition process. A memory material layer and a top electrode layer are formed over the bottom electrode layer. The bottom electrode layer, the memory material layer, and the top electrode layer are patterned to respectively form a bottom electrode, a memory layer, and a top electrode.


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