The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2024

Filed:

Sep. 28, 2023
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Qinxiang Wei, Wuhan, CN;

Jianhua Sun, Wuhan, CN;

Ji Xia, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2023.01); H01L 21/28 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 29/40117 (2019.08); H10B 43/35 (2023.02); H10B 43/40 (2023.02);
Abstract

In an example, a three-dimensional (3D) memory device includes a memory stack and a through stair contact (TSC). The memory stack includes interleaved conductive layers and dielectric layers. The memory stack includes stairs in a staircase region. The TSC extends through the memory stack in the staircase region. The TSC includes a first conductor layer and a first spacer circumscribing the first conductor layer. The first conductor layer of the TSC is insulated from the conductive layers of the memory stack by the first spacer.


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