The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2024

Filed:

Mar. 23, 2022
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Michael A. Stockinger, Austin, TX (US);

Mohamed Suleman Moosa, Austin, TX (US);

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H02H 9/04 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0292 (2013.01); H01L 27/0255 (2013.01); H01L 27/0296 (2013.01); H02H 9/046 (2013.01);
Abstract

A double IO pad cell including a busing frame formed on a busing metal layer aligned with a same-sized component frame integrated on a component layer of an IC. The busing frame includes first and second IO pads, a supply voltage rail, and a ground voltage rail. The component frame includes first and second primary ESD circuitry each including a first diode coupled between a respective one of the first and second IO pads and the supply voltage rail and a second diode coupled between the respective IO pad and the ground voltage rail. The second diodes of each primary ESD circuitry are integrated adjacent each other sandwiched between the first diodes which act as collector guard bands for the second diodes. The diodes of each primary ESD circuitry of the component frame are aligned with a corresponding one of the first and second IO pads of the busing frame.


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