The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2024

Filed:

Sep. 09, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Ted Wong, Ottawa, CA;

Saman Adham, Kanata, CA;

Marat Gershoig, Ottawa, CA;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/38 (2006.01); G11C 29/36 (2006.01);
U.S. Cl.
CPC ...
G11C 29/38 (2013.01); G11C 29/36 (2013.01);
Abstract

Performing a built-in self-test (BIST) on a memory macro includes generating a plurality of input vectors. One input vector is transmitted to the memory macro in each of a plurality of cycles. Each of the plurality of input vectors is associated with a bit width. Generating the input vector includes generating a partial input vector of half the bit width and transmitting the partial input vector to each of a first half of the memory macro and a second half of the memory macro. The method also includes receiving, in each of the plurality of cycles, an output data from the memory macro, such that the output data is generated by the memory macro in response to processing the partial input vector, comparing the output data with a signature value, and determining whether the memory macro is normal or faulty based upon the comparison.


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