The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2024

Filed:

Jul. 12, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Sungsoo Chi, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 11/408 (2006.01); G11C 11/4091 (2006.01); G11C 11/4094 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); G11C 11/4085 (2013.01); G11C 11/4094 (2013.01); G11C 11/4096 (2013.01);
Abstract

The present disclosure provides a sense amplification structure and a memory architecture. The sense amplification structure includes: a first PMOS transistor provided with a gate connected to a second readout bit line and a source connected to a first signal terminal; a first NMOS transistor provided with a gate connected to an initial bit line; a drain of the first PMOS transistor and a drain of the first NMOS transistor being connected to a first complementary readout bit line; a second PMOS transistor provided with a gate connected to the second complementary readout bit line; a second NMOS transistor provided with a gate connected to an initial complementary bit line and a source connected to a second signal terminal; a drain of the second PMOS transistor and a drain of the second NMOS transistor being connected to the first readout bit line.


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