The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2024

Filed:

Mar. 30, 2023
Applicants:

Avary Holding(shenzhen)co., Ltd., Shenzhen, CN;

Hongqisheng Precision Electronics(qinhuangdao)co., Ltd., Hebei Province, CN;

Garuda Technology Co., Ltd., New Taipei, TW;

Inventors:

Mao-Feng Hsu, Taoyuan, TW;

Zhi-Hong Yang, Guangzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
H05K 1/024 (2013.01); H05K 1/0242 (2013.01); H05K 3/4661 (2013.01); H05K 3/4688 (2013.01); H05K 2201/0723 (2013.01);
Abstract

A wiring substrate includes a first insulating layer with a first opening, a second insulating layer with a second opening, a high-frequency wiring layer, a first wiring layer, a second wiring layer, and a plurality of conductive pillars. The high-frequency wiring layer including a high-frequency trace is sandwiched between the first insulating layer and the second insulating layer. The first opening and the second opening expose two sides of the high-frequency trace respectively. The high-frequency trace has a smooth surface which is not covered by the first insulating layer and the second insulating layer and has the roughness ranging between 0.1 and 2 μm. The first insulating layer and the second insulating layer are all located between the first wiring layer and the second wiring layer. The conductive pillars are disposed in the second insulating layer and connected to the high-frequency trace.


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