The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2024

Filed:

Dec. 29, 2022
Applicant:

Yangtze Memory Technologies Co., Ltd., Hubei, CN;

Inventor:

Huangpeng Zhang, Hubei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3013 (2013.01); G06F 9/30134 (2013.01);
Abstract

Disclosed herein are memory device, method for managing a storage system. In an aspect, a memory device comprises an address register to store addresses and a processor coupled to the address register. The processor is configured to receive a first multi-plane program operation command of a set of multi-plane program operation commands. The processor is further configured to latch a first address of the first multi-plane program operation command into the address register. In addition, the processor is further configured to receive a read operation command that includes a second address and refrain from latching the second address into the address register.


Find Patent Forward Citations

Zhang, Huangpeng. (2024). Bus-interleave protocol to improve multiple logic unit (lun) operation efficiency (U.S. Patent No. 12026514). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12026514

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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