The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2024

Filed:

Dec. 27, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Kang-Yong Kim, Boise, ID (US);

Hyun Yoo Lee, Boise, ID (US);

Timothy M. Hollis, Meridian, ID (US);

Dong Soon Lim, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01); H04L 25/49 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03057 (2013.01); H04L 25/4917 (2013.01);
Abstract

Described apparatuses and methods are directed to equalization with pulse-amplitude modulation (PAM) signaling. As bus frequencies have increased, the time for correctly transitioning between voltage levels has decreased, which can lead to errors. Symbol decoding reliability can be improved with equalization, like with decision-feedback equalization (DFE). DFE, however, can be expensive for chip area and power usage. Therefore, instead of applying DFE to all voltage level determination paths in a receiver, DFE can be applied to a subset of such determination paths. With PAM4 signaling, for example, a DFE circuit can be coupled between an output and an input of a middle slicer. In some cases, symbol detection reliability can be maintained even with fewer DFE circuits by compressing a middle eye of the PAM4 signal. The other two eyes thus have additional headroom for expansion. Encoding schemes, impedance terminations, or reference voltage levels can be tailored accordingly.


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