The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2024

Filed:

Aug. 27, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Te-Hsin Chiu, Miaoli County, TW;

Shih-Wei Peng, Hsinchu, TW;

Wei-Cheng Lin, Taichung, TW;

Jiann-Tyng Tzeng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/76895 (2013.01); H01L 23/528 (2013.01); H01L 27/0207 (2013.01);
Abstract

An integrated circuit structure is disclosed, including a gate, a first conductive line and a pair of second conductive lines, and a first feed-through via. The gate is disposed on a front side of the integrated circuit structure and extends in a first direction on a first side of a dielectric layer. The first conductive line and a pair of second conductive lines are disposed on a second side, opposite of the first side, of the dielectric layer and on a back side, opposite of the front side, of the integrated circuit structure. The first conductive line is interposed between the pair of second conductive lines in a layout view. The first feed-through via extends through the dielectric layer in a second direction different from the first direction. The first feed-through via couples the gate to the first conductive line.


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