The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2024

Filed:

Mar. 20, 2023
Applicants:

Stmicroelectronics International N.v., Geneva, CH;

Stmicroelectronics Application Gmbh, Aschheim-Dornach, DE;

Inventors:

Roberto Colombo, Munich, DE;

Vivek Mohan Sharma, New Delhi, IN;

Samiksha Agarwal, New Delhi, IN;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31703 (2013.01); G01R 31/31722 (2013.01);
Abstract

In an embodiment a processing system includes a test circuit configured to set an address value, an upper address limit and a lower address limit to a given reference bit sequence, verify whether the upper-limit comparison signal has a respective third logic level and/or whether the lower-limit comparison signal has the respective third logic level, assert an error signal in response to determining that the upper-limit comparison signal does not have the respective third logic level or the lower-limit comparison signal does not have the respective third logic level, repeat a certain operation for each of the N bits.


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