The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2024

Filed:

Jun. 26, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Mohammad Kabir, Portland, OR (US);

Conor P. Puls, Portland, OR (US);

Babita Dhayal, Aloha, OR (US);

Han Li, Hillsboro, OR (US);

Keith E. Zawadzki, Portland, OR (US);

Hannes Greve, Portland, OR (US);

Avyaya Jayanthinarasimham, Hillsboro, OR (US);

Mukund Bapna, Hillsboro, OR (US);

Doug B. Ingerly, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/762 (2006.01); H01L 23/58 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 23/564 (2013.01); H01L 21/76251 (2013.01); H01L 23/562 (2013.01); H01L 23/585 (2013.01); H01L 27/1203 (2013.01);
Abstract

Moisture hermetic guard ring structures for semiconductor devices, related systems, and methods of fabrication are disclosed. Such devices systems, and methods include a guard ring structure laterally surrounding semiconductor devices of a device layer and metal interconnects of an interconnect layer, the guard ring structure extending through the interconnect layer, the device layer, and a bonding layer adjacent one of the interconnect layer or the device layer the bonding layer, and contacting a support substrate coupled to the bonding layer. Such devices systems, and methods may further include via structures having the same material system as the guard ring structure and also extending through the interconnect, the device, and bonding layers and contacting a support substrate.


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