The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2024

Filed:

Aug. 18, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Zhongming Liu, Hefei, CN;

Jia Fang, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3213 (2006.01); H01L 21/308 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 21/32135 (2013.01); H01L 21/308 (2013.01); H01L 21/76838 (2013.01); H01L 23/528 (2013.01);
Abstract

A method for manufacturing a semiconductor structure includes: a substrate with a groove structure formed therein is provided; a laminated structure is formed on the substrate, which includes a first conductive material layer, a second conductive material layer and an insulating material layer from bottom up, and the first conductive material layer fills the groove structure and covers the surface of the substrate; the insulating material layer, the second conductive material layer and the first conductive material layer are sequentially etched to form a bit line structure, in which a process of etching the first conductive material layer includes a first etching stage and a second etching stage, such that a bottom width of the first pattern structure located in the groove structure is not smaller than that of the first pattern structure located outside the groove structure.


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