The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2024

Filed:

Nov. 02, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Altug Koker, El Dorado Hills, CA (US);

Abhishek R. Appu, El Dorado Hills, CA (US);

Bhushan M. Borole, Rancho Cordova, CA (US);

Wenyin Fu, Folsom, CA (US);

Kamal Sinha, Rancho Cordova, CA (US);

Joydeep Ray, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/3234 (2019.01); G06F 1/3237 (2019.01); G06F 1/324 (2019.01); G06F 1/3296 (2019.01); G09G 5/36 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3234 (2013.01); G06F 1/3237 (2013.01); G06F 1/324 (2013.01); G06F 1/3296 (2013.01); G09G 5/363 (2013.01); G09G 5/366 (2013.01); G09G 2310/066 (2013.01); G09G 2310/08 (2013.01); G09G 2340/02 (2013.01); G09G 2360/06 (2013.01); G09G 2360/08 (2013.01); G09G 2370/022 (2013.01); G09G 2370/16 (2013.01);
Abstract

In one embodiment, a processor includes: a graphics processor to execute a workload; and a power controller coupled to the graphics processor. The power controller may include a voltage ramp circuit to receive a request for the graphics processor to operate at a first performance state having a first operating voltage and a first operating frequency and cause an output voltage of a voltage regulator to increase to the first operating voltage. The voltage ramp circuit may be configured to enable the graphics processor to execute the workload at an interim performance state having an interim operating voltage and an interim operating frequency when the output voltage reaches a minimum operating voltage. Other embodiments are described and claimed.


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