The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2024

Filed:

Aug. 20, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Scott Jeremy Weber, Piedmont, CA (US);

Aravind Raghavendra Dasu, Milpitas, CA (US);

Mahesh A. Iyer, Fremont, CA (US);

Patrick Koeberl, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2020.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H03K 19/17756 (2020.01);
U.S. Cl.
CPC ...
H03K 19/17756 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06527 (2013.01);
Abstract

An integrated circuit device may include a programmable fabric die having programmable logic fabric and configuration memory that may configure the programmable logic fabric. The integrated circuit device may also include a base die that may provide fabric support circuitry, including memory and/or communication interfaces as well as compute elements that may also be application-specific. The memory in the base die may be directly accessed by the programmable fabric die using a low-latency, high capacity, and high bandwidth interface.


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