The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2024

Filed:

Nov. 30, 2021
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventors:

Shin-Cheng Lin, Hsinchu County, TW;

Chia-Ching Huang, Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/15 (2006.01); H01L 29/10 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/778 (2006.01); H01L 31/0256 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1075 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/7786 (2013.01);
Abstract

A high electron mobility transistor includes a substrate, a compound semiconductor stacked layer, a cap layer, a gate electrode, a source electrode, a drain electrode, and a buried electrode and/or a conductive structure. The substrate has an active area. The cap layer is disposed on the compound semiconductor stacked layer. The gate electrode is disposed on the cap layer and extends along a first direction. The source electrode and the drain electrode are disposed on the compound semiconductor stacked layer, respectively on two sides of the gate electrode, and arranged along a second direction, where the first direction is perpendicular to the second direction. The conductive structure and/or the buried electrode passes through the compound semiconductor stacked layer and surrounds or lies in the active area, where the conductive structure and/or the buried electrode has a constant electric potential or is grounded.


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