The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2024

Filed:

May. 26, 2023
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Vedvyas Shanbhogue, Austin, TX (US);

Jason W. Brandt, Austin, TX (US);

Ravi L. Sahita, Portland, OR (US);

Barry E. Huntley, Hillsboro, OR (US);

Baiju V. Patel, Portland, OR (US);

Deepak K. Gupta, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/46 (2006.01); G06F 21/52 (2013.01);
U.S. Cl.
CPC ...
G06F 9/3004 (2013.01); G06F 9/30134 (2013.01); G06F 9/461 (2013.01); G06F 21/52 (2013.01);
Abstract

Methods and apparatuses relating to switching of a shadow stack pointer are described. In one embodiment, a hardware processor includes a hardware decode unit to decode an instruction, and a hardware execution unit to execute the instruction to: pop a token for a thread from a shadow stack, wherein the token includes a shadow stack pointer for the thread with at least one least significant bit (LSB) of the shadow stack pointer overwritten with a bit value of an operating mode of the hardware processor for the thread, remove the bit value in the at least one LSB from the token to generate the shadow stack pointer, and set a current shadow stack pointer to the shadow stack pointer from the token when the operating mode from the token matches a current operating mode of the hardware processor.


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