The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2024

Filed:

Mar. 02, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Agostino Macerola, San Benedetto dei Marsi, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/575 (2006.01); G05F 1/56 (2006.01); G05F 1/563 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G05F 1/575 (2013.01); G05F 1/562 (2013.01); G05F 1/563 (2013.01); G11C 5/148 (2013.01);
Abstract

An apparatus includes a voltage regulator coupled with a first voltage source, which supplies core memory circuitry. A first transistor is coupled between an output of the voltage regulator and input/output (I/O) circuitry. A second transistor is coupled between a second voltage source and the I/O circuitry, the second voltage source to power a set of I/O buffers. Control logic coupled with gates of the first and second transistors is to perform operations including: causing the second transistor to be activated to permit current to flow from the second voltage source to the I/O circuitry; in response to detecting a current draw from the I/O circuitry that satisfies a first threshold criterion, causing the first transistor to be activated; and causing the second transistor to be deactivated over a time interval during which the I/O circuitry is powered by the first voltage source and the second voltage source.


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