The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2024

Filed:

Dec. 02, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Itamar Levin, Holon, IL;

Tali Warshavsky, Ramat Gan, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03019 (2013.01); G06F 13/4282 (2013.01); H04L 2025/03636 (2013.01);
Abstract

Examples described herein include setting an equalizer tap setting and gain setting in a serializer/deserializer (SerDes). In some examples, determining an equalizer setting and gain setting occurs by causing a mean-square error cost scheme tracking to lock to an offset from a minimum of a cost of the mean-square error cost scheme without pausing error cost tracking. In some examples, the mean-square error cost scheme comprises a least mean square (LMS) scheme. In some examples, determining an equalizer setting comprises: applying increases or decreases to an equalizer setting, and an increase to an equalizer setting can be a different amount than an amount of decrease to an equalizer setting.


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