The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2024

Filed:

Jun. 29, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Doddaballapur N. Jayasimha, Saratoga, CA (US);

Jonas Svennebring, Sollentuna, SE;

Samantika S. Sury, Westford, MA (US);

Christopher J. Hughes, Santa Clara, CA (US);

Jong Soo Park, Santa Clara, CA (US);

Lingxiang Xiang, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/46 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3004 (2013.01); G06F 9/3001 (2013.01); G06F 9/30185 (2013.01); G06F 9/3836 (2013.01); G06F 9/46 (2013.01); G06F 13/28 (2013.01);
Abstract

Disclosed embodiments relate to atomic memory operations. In one example, a method of executing an instruction atomically and with weak order includes: fetching, by fetch circuitry, the instruction from code storage, the instruction including an opcode, a source identifier, and a destination identifier, decoding, by decode circuitry, the fetched instruction, selecting, by a scheduling circuit, an execution circuit among multiple circuits in a system, scheduling, by the scheduling circuit, execution of the decoded instruction out of order with respect to other instructions, with an order selected to optimize at least one of latency, throughput, power, and performance, and executing the decoded instruction, by the execution circuit, to: atomically read a datum from a location identified by the destination identifier, perform an operation on the datum as specified by the opcode, the operation to use a source operand identified by the source identifier, and write a result back to the location.


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