The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2024

Filed:

Mar. 16, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Xing Wang, Shanghai, CN;

Liping Xu, Shanghai, CN;

Xu Zhang, Shanghai, CN;

Zhen Gu, Shanghai, CN;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2016.01);
U.S. Cl.
CPC ...
G06F 12/10 (2013.01);
Abstract

Methods, systems, and devices for logical-to-physical (L2P) mapping compression techniques are described. A memory system may use an L2P mapping to map logical addresses to physical addresses of the memory system. The L2P mapping may be a hierarchical L2P mapping divided into multiple levels or subsets that are used to identify a physical address corresponding to a logical address. The memory system may write data to a set of physical addresses that are consecutively indexed and may set a flag in an entry of a second-level of the L2P mapping (e.g., of a three-level L2P mapping) to indicate that the entry is associated with a starting physical address of the consecutively indexed physical addresses. The memory system may subsequently read the data starting at the starting physical address based on the flag (e.g., bypassing reading an entry of a lowest-level of the L2P mapping to determine the physical address).


Find Patent Forward Citations

Loading…