The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2024

Filed:

Feb. 03, 2021
Applicant:

Changxin Memory Technologies, Inc., Anhui, CN;

Inventor:

Chia-Chi Hsu, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 23/02 (2006.01); G01R 31/317 (2006.01); G06F 11/26 (2006.01); G06F 11/267 (2006.01); G06F 11/273 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31713 (2013.01); G06F 11/267 (2013.01); G06F 11/273 (2013.01);
Abstract

The present invention provides a test method, a tester, a load board and a test system. The test method includes: outputting, through a first input/output (I/O) port of a tester, a first test signal to a first channel of a load board, wherein the first test signal is used to generate a second test signal and a third test signal; receiving, through the first I/O port, a third feedback signal returned from the first channel, wherein the third feedback signal is generated based on a first feedback signal and a second feedback signal; and determining whether a first chip and a second chip are operating normally based on the third feedback signal. Solutions provided in the present invention are capable of increasing the number of chips that can be tested at a single time.


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