The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2024

Filed:

Apr. 09, 2021
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Krishnan Srinivasan, San Jose, CA (US);

Abbas Morshed, Los Altos, CA (US);

Aman Gupta, Santa Clara, CA (US);

Sagheer Ahmad, Cupertino, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 45/302 (2022.01); G06F 15/78 (2006.01); H04L 45/00 (2022.01); H04L 45/42 (2022.01); H04L 45/745 (2022.01);
U.S. Cl.
CPC ...
H04L 45/302 (2013.01); G06F 15/7825 (2013.01); H04L 45/42 (2013.01); H04L 45/566 (2013.01); H04L 45/745 (2013.01); H04L 45/34 (2013.01);
Abstract

Embodiments herein describe an integrated circuit that includes a network on chip (NoC) where an egress logic block or switch performs a route lookup for a subsequent (e.g., downstream) switch in the NoC (referred to herein as look-ahead routing). After receiving the packet and a port ID from the egress logic block or the switch, the downstream switch knows, without performing route lookup of its own, on which port it should forward the packet. Thus, if the downstream switch performs other functions that are dependent on knowing the destination port (e.g., arbitration or QoS updating), the downstream switch can perform those functions immediately since the port ID was already determined by, and received from, the previous network element.


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