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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11978700 B1

PDFFull Text
Date of Patent:
May. 07, 2024

Filed:

Jul. 25, 2022

Power semiconductor module arrangement

Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Olaf Hohlfeld, Warstein, DE;

Peter Kanschat, Soest, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:

Murphy, Bilak & Homiller, PLLC

Primary Examiner:

Laura M Menz

Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/56 (2006.01); H01L 23/24 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/40 (2006.01); H01L 23/498 (2006.01); H01L 25/07 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49861 (2013.01); H01L 21/568 (2013.01); H01L 23/24 (2013.01); H01L 23/3107 (2013.01); H01L 23/3135 (2013.01); H01L 23/3672 (2013.01); H01L 23/4006 (2013.01); H01L 23/49844 (2013.01); H01L 25/072 (2013.01); H01L 23/564 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13062 (2013.01); H01L 2924/13064 (2013.01); H01L 2924/13091 (2013.01);
Abstract

A power semiconductor module arrangement includes two or more individual semiconductor devices arranged on a base layer. Each semiconductor device includes a lead frame, a semiconductor body arranged on the lead frame, and a molding material enclosing the semiconductor body and at least part of the lead frame. A frame is arranged on the base layer such that the frame surrounds the two or more individual semiconductor devices. A casting compound at least partly fills a capacity formed by the base layer and the frame, such that the casting compound at least partly encloses the two or more individual semiconductor devices.

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