The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2024

Filed:

Apr. 11, 2022
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Yanjie Wang, Santa Clara, CA (US);

Ohwon Kwon, Pleasanton, CA (US);

Kou Tei, San Jose, CA (US);

Tai-Yuan Tseng, Milpitas, CA (US);

Yasue Yamamoto, Fujisawa, JP;

Yonggang Wu, San Jose, CA (US);

Guirong Liang, Santa Clara, CA (US);

Assignee:

SanDisk Technologies LLC, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/16 (2006.01); G11C 16/24 (2006.01); G11C 16/26 (2006.01); G11C 16/30 (2006.01); G11C 16/34 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/16 (2013.01); G11C 16/24 (2013.01); G11C 16/30 (2013.01); G11C 16/3459 (2013.01); H01L 24/08 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 25/0657 (2013.01); H01L 2224/08148 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/48149 (2013.01); H01L 2224/48229 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06562 (2013.01);
Abstract

A memory system having a dynamic supply voltage to sense amplifiers. The supply voltage has a higher magnitude when charging inhibited bit lines during a program operation and a lower magnitude when verifying/sensing memory cells. Reducing the magnitude of the supply voltage saves power and/or current. However, if the lower magnitude were used when the inhibited bit lines are charged during the program operations, some of the memory cells that should be inhibited from programming might experience at least some programming. Using the higher magnitude supply voltage during bit line charging of the program operation assures that the inhibited bit lines are charged to a sufficient voltage to keep drain side select gates of NAND strings off so that the NAND channel will boost properly to inhibit programming of such memory cells.


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