The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2024

Filed:

Jun. 08, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Yu Li, Hefei, CN;

Teng Shi, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/05 (2006.01); G11C 11/4076 (2006.01); G11C 29/02 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G11C 29/023 (2013.01); H03K 5/05 (2013.01);
Abstract

A method and an apparatus for testing an adjustment circuit is applied to a test platform. The adjustment circuit includes a duty cycle adjuster (DCA) circuit. The method includes: receiving written data at a specified storage address based on a first read/write clock signal; and receiving read data from the specified storage address based on a second read/write clock signal, and generating a test result of the DCA circuit based on the written data and the read data; wherein the DCA circuit is configured to adjust a first initial read/write clock signal to generate the first read/write clock signal and/or adjust a second initial read/write clock signal to generate the second read/write clock signal, and a duty cycle of the first initial read/write clock signal and/or a duty cycle of the second initial read/write clock signal have/has a first deviation.


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