The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2024
Filed:
Nov. 17, 2021
Realtek Semiconductor Corporation, Hsinchu, TW;
Kuo-Wei Chi, Hsinchu, TW;
Chun-Chi Yu, Hsinchu, TW;
Chih-Wei Chang, Hsinchu, TW;
Ger-Chih Chou, San Jose, CA (US);
REALTEK SEMICONDUCTOR CORPORATION, Hsinchu, TW;
Abstract
Disclosed is a DDR SDRAM signal calibration device capable of adapting to the variation of voltage and/or temperature. The device includes: an enablement signal setting circuit configured to generate data strobe (DQS) enablement setting; a signal gating circuit configured to generate a DQS enablement setting signal and a DQS enablement signal according to the DQS enablement setting and then output a gated DQS signal according to the DQS enablement signal and a DQS signal; and a calibration circuit configured to generate a first delay signal according to the DQS enablement setting signal and generate a second delay signal according to the first delay signal, the calibration circuit further configured to generate a calibration signal according to the first and second delay signals and the DQS signal. The enablement signal setting circuit maintains or adjusts the DQS enablement setting according to the calibration signal.