The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2024
Filed:
Feb. 17, 2023
Infineon Technologies Llc, San Jose, CA (US);
Edwin Kim, Colorado Springs, CO (US);
Alan D. Devilbiss, Colorado Springs, CO (US);
Kapil Jain, Colorado Springs, CO (US);
Patrick F. O'Connell, Monument, CO (US);
Franklin Brodsky, Colorado Springs, CO (US);
Shan Sun, Monument, CO (US);
Fan Chu, Colorado Springs, CO (US);
Infineon Technologies LLC, San Jose, CA (US);
Abstract
A method of operating a memory device that includes the steps of receiving a read command and a target address in a non-volatile memory (NVM) array, in which the NVM array is divided into a plurality of blocks based on row and column addresses, performing a read operation on NVM cells in the target address and coupling an output of each NVM cell read to a sensing circuit, generating a local reference voltage based on a base reference voltage and an adjustment reference voltage corresponding to the target address of the NVM cells being read and a block that the NVM cells belong thereto, and offsetting the base reference voltage with the adjustment reference voltage, and coupling the local reference voltage to the sensing circuit. Other embodiments are also described.