The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2024

Filed:

Mar. 10, 2023
Applicants:

Silicon Storage Technology, Inc., San Jose, CA (US);

The Regents of the University of California, Oakland, CA (US);

Inventors:

Farnood Merrikh Bayat, Goleta, CA (US);

Xinjie Guo, Goleta, CA (US);

Dmitri Strukov, Goleta, CA (US);

Nhan Do, Saratoga, CA (US);

Hieu Van Tran, San Jose, CA (US);

Vipin Tiwari, Dublin, CA (US);

Mark Reiten, Alamo, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/54 (2006.01); G06F 3/06 (2006.01); G06N 3/04 (2023.01); G06N 3/045 (2023.01); G06N 3/063 (2023.01); G11C 16/08 (2006.01); G11C 16/12 (2006.01); G11C 16/16 (2006.01); G11C 16/34 (2006.01); G11C 29/38 (2006.01);
U.S. Cl.
CPC ...
G11C 11/54 (2013.01); G06F 3/061 (2013.01); G06F 3/0655 (2013.01); G06F 3/0688 (2013.01); G06N 3/04 (2013.01); G06N 3/045 (2023.01); G06N 3/063 (2013.01); G11C 16/08 (2013.01); G11C 16/12 (2013.01); G11C 16/16 (2013.01); G11C 16/3436 (2013.01); G11C 29/38 (2013.01);
Abstract

Numerous examples are disclosed for verifying a weight programmed into a selected non-volatile memory cell in a neural memory. In one example, a circuit comprises a digital-to-analog converter to convert a target weight comprising digital bits into a target voltage, a current-to-voltage converter to convert an output current from the selected non-volatile memory cell during a verify operation into an output voltage, and a comparator to compare the output voltage to the target voltage during a verify operation.


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