The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

Jan. 18, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chung-Hui Chen, Hsinchu, TW;

Tung-Tsun Chen, Hsinchu, TW;

Jui-Cheng Huang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/417 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 29/08 (2006.01); H01L 29/40 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01); H01L 23/34 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4175 (2013.01); H01L 21/823418 (2013.01); H01L 21/823475 (2013.01); H01L 21/823814 (2013.01); H01L 29/0847 (2013.01); H01L 29/401 (2013.01); H01L 29/41725 (2013.01); H01L 29/41766 (2013.01); H01L 29/4933 (2013.01); H01L 29/665 (2013.01); H01L 29/7845 (2013.01); H01L 29/78618 (2013.01); H01L 23/345 (2013.01); H01L 27/0629 (2013.01);
Abstract

A method of manufacturing a semiconductor structure includes forming an active region having a first portion which is doped. The method further includes forming a first silicide layer over and electrically coupled to the first portion of the active region. The method further includes forming a second silicide layer under and electrically coupled to the first portion of the active region. The method further includes forming a first metal-to-drain/source (MD) contact structure over and electrically coupled to the first silicide layer. The method further includes forming a first via-to-MD (VD) structure over and electrically coupled to the MD contact structure. The method further includes forming a buried via-to-source/drain (BVD) structure under and electrically coupled to the second silicide layer.


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